LPC2148FBD64

Product Summary

The LPC2148FBD64 is a microcontroller. The LPC2148FBD64 is based on a 16-bit/32-bit ARM7TDMI-S CPU with real-time emulation and embedded trace support, that combine the microcontroller with embedded high-speed flash memory ranging from 32 kB to 512 kB. A 128-bit wide memory interface and a unique accelerator architecture enable 32-bit code execution at the maximum clock rate. For critical code size applications, the LPC2148FBD64 alternative 16-bit Thumb mode reduces code by more than 30 % with minimal performance penalty

Parametrics

LPC2148FBD64 absolute maximum ratings: (1)VDD, supply voltage (core and external rail): -0.5 to +3.6 V; (2)VDDA, analog 3.3 V pad supply voltage: -0.5 to +4.6 V; (3)Vi(VBAT), input voltage on pin VBAT for the RTC: -0.5 to +4.6 V; (4)Vi(VREF), input voltage on pin VREF: -0.5 to +4.6 V; (5)VIA, analog input voltage on ADC related pins: -0.5 to +5.1 V; (6)VI, input voltage 5 V tolerant I/O pins; only valid when the VDD supply voltage is present: -0.5 to +6.0V; other I/O pins: -0.5 to VDD + 0.5 V; (7)IDD, supply current per supply pin: 100mA; (8)ISS, ground current per ground pin: 100mA; (9)Isink, sink current: 20 mA; (10)Tstg, storage temperature: -65 to +150℃; (11)Ptot(pack), total power dissipation (per package) based on package heat transfer, not device power consumption: 1.5W; (12)Vesd electrostatic discharge voltage human body model: -4000 to +4000 V.

Features

LPC2148FBD64 features: (1)16-bit/32-bit ARM7TDMI-S microcontroller in a tiny LQFP64 package; (2)8 kB to 40 kB of on-chip static RAM and 32 kB to 512 kB of on-chip flash memory; (3)128-bit wide interface/accelerator enables high-speed 60 MHz operation; (4)In-System Programming/In-Application Programming (ISP/IAP) via on-chip boot loader software. Single flash sector or full chip erase in 400 ms and programming of 256 B in 1 ms; (5)EmbeddedICE RT and Embedded Trace interfaces offer real-time debugging with the on-chip RealMonitor software and high-speed tracing of instruction execution; (6)USB 2.0 Full-speed compliant device controller with 2 kB of endpoint RAM. In addition, the LPC2146/48 provides 8 kB of on-chip RAM accessible to USB by DMA; (7)Two 32-bit timers/external event counters (with four capture and four compare channels each), PWM unit (six outputs) and watchdog; (8)Low power Real-Time Clock (RTC) with independent power and 32 kHz clock input.

Diagrams